A method of fabricating a capacitor in a semiconductor substrate is described in U.S. Pat. No. 6,693,016, which is incorporated herein by reference. The capacitor according to this patent comprises a dielectric layer with a relatively high dielectric constant and metallic electrode layers to avoid space charge regions.
Prior art methods of fabricating capacitors in a substrate induce a significant mechanical stress inside the substrate's surface. Due to this mechanical stress, the substrate may bow. Substrates such as wafers of large diameters are difficult to handle and to further process if they are bent or non-planar.